Frequency synthesizers are generally known. As known, a frequency synthesizer is a device which generates an output frequency that is typically an integer multiple of a reference frequency. Such devices have wide application in communication systems in transmitters and receivers as a means for changing a transmitting or receiving channel.
A commonly known frequency synthesizer uses a phase locked loop (PLL), where an output signal is compared with a reference signal and the phase difference used to control the output. A voltage controlled oscillator (VCO) is used to generate the output signal. A frequency divider is used to divide the frequency of the output signal by some integer value. The divided signal is then compared with a reference signal in a phase comparator. The output of the phase comparator is scaled, low-pass filtered and applied as a frequency controlling input to the VCO.
Recent innovations have included the development of fractional frequency dividers. The development of fractional frequency dividers has dramatically improved the utility of frequency synthesizers. In the past, a PLL frequency synthesizer could only synthesize frequencies that were an integer multiple of the reference frequency. The development of a fractional divider now means that virtually any frequency can be provided by any PLL frequency synthesizer using a fractional divider.
While the name "fractional frequency divider" suggests division by some fractional value, the actual division is fractional only in terms of an average value. To accomplish fractional frequency division, a divisor within the fractional frequency divider is incrementally changed over the course of a timing interval in such a way as to correct for the fractional differences caused by integer division.
In practice, a fractional frequency divider may include an integer divider, a summer and a delta-sigma converter. The divider divides the frequency of an incoming signal based upon some fractional control number N.F. The fractional control number is in turn made up of an integer portion N and a fractional portion F. The delta-sigma converter receives the fractional portion as an input and provides a series of integer value corrections as an output. The integer value corrections are summed with the integer portion in the summer and the result used as the divisor for fractional frequency division.
The output signal of the fractional frequency divider is then compared with a reference signal in a phase comparator. Any phase difference detected in the phase comparator is scaled and low-pass filtered. The scaled, low-pass filtered difference signal may then be applied to a VCO to achieve the desired synthesized frequency.
While frequency synthesizers using fractional frequency dividers are effective in fixed frequency applications, there are many situations where a modulation scheme also requires phase control. Accordingly a need exists for a method of imposing phase control on a frequency synthesizer using fractional frequency division.